14 errors in circuit design

Phenomenon one: the board of the PCB design requirements are not high, with a little bit of the line, automatic cloth bar

Comment: automatic routing is bound to occupy a larger PCB area, generated at the same time than manual wiring, how many times the hole, in the great bulk products, PCB manufacturers price the considered factors in addition to business factors, is the line width and the number of vias, which affects PCB product rate and bit consumption quantity, saving cost suppliers, to price found a reason.

Phenomenon two: these bus signals are used to pull the resistance, feel more at ease.

Comments: the reason for the need to pull the signal a lot, but it is not all to pull. The pull-down resistor pull a simple input signal, current will be below a few tens of microamperes, but pull a motivated signal, the current will reach milliamperes, now the system is often data address the 32-bit, there may be 244/245 isolation after the bus and other signal, are pulled, a few watts of power consumption in the resistance.

Phenomenon three: CPU and FBGA of these do not have the I/O port how to deal with it? Let it empty, then say.

Comments: without the mouth of the I/O if left, a little interference by the outside world may be a repeated oscillation of the input signal, and the power consumption of MOS devices basically depends on the number of gate circuit. If the pull on it, each pin will be a microampere level current, so the best way is set to output (of course, can not be outside connected to signal to the driver)

Four: the FPGA with so many use, can enjoy the play.

Commented: FGPA power consumption is proportional to the number of flip flops and the number of flip flops, so the same model of FPGA power consumption at different times in different circuits may be a difference of 100 times. Minimizing the number of flip flops is the fundamental way to reduce the power consumption of FPGA.

Phenomenon five: the power consumption of these small chips are very low, do not consider

Comments: for internal less complex chip power consumption is difficult to determine, which is mainly composed of a pin on the current determined, a abt16244, no load power consumption is probably less than 1 mA, but its target is each pin can be driven 60 Ma of load (such as the matching of tens of ohms resistance), namely the full load of the maximum power of up to 60*16=960mA, is, of course, only supply current is so big and heat are fall to load on the.

The phenomenon of six: memory have so much control signal, I this board only need to OE and W-E signal can be used, chip select is grounded, such a reading operation data out more quickly.

Comments: most of the memory power consumption in valid chip select (whether OE and W-E to deselect 100 times more than, it should be as far as possible the use of CS to control chip, and to meet the other requirements as far as possible short select pulse width shrinkage.

Seven phenomena: how do these signals have been washed, ah, as long as the match was good, it can be eliminated

Comments: in addition to a small number of specific signals (such as CML, 100BASE-T), there is a red, as long as it is not very large, do not necessarily need to match, even if the match is not to match the best. Like TTL output impedance of 50 ohms, or even 20 ohm, if with such a matching resistor, the current is very big, power consumption is unacceptable, also signal amplitude will also be small can not be used, say general signal in low output high level output electric usual output impedance is not the same, and there is no way to do perfectly matched. So for TTL, LVDS, 422 and other signal matching as long as it is too red to be acceptable.

Phenomenon eight: lower power consumption is a matter of hardware, and software does not matter.

Comments: Hardware simply take the stage, singing opera is software, access the bus almost every chip, each signal flip almost all by software control, if the software can reduce the number of external memory access (multi use register variable, use more internal cache), timely response to interrupt (interrupt is often low level effectively and with pull ups) and other specific single board specific measures will be to reduce power consumption made great contribution.


(Source: Inside information)

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