Parallel design strategy for high speed PCB

The overall process analysis of PCB design can be broadly divided into the following stages: netlist introduction, encapsulation, database building, master design, physical and electrical constraint design, layout, wiring, design review, design output. For a complex design, from the task itself, layout and wiring is relatively heavy, especially the wiring, experience from the long-term practice, the manual wiring is still the main form of important signal wiring.

Considering the complexity and difficulty of the task of layout and routing, parallel design method is considered. Parallel design methods for layout and routing are basically similar, with only different objectives. As an illustration of the layout, a brief description of the special points of parallel routing design is given.


Task analysis and decomposition


Layout analysis is the starting point of the analysis of structural design constraints and circuit topology, positioning structure design constraints including border shape and size requirements, installation holes and special components and high requirements, the use of the area constraint.

Consider a typical design example, using the mobile phone panel design as an example. From the circuit topology observation, the general principle block diagram is shown in figure 1. Observe in Figure 1 that the signal characteristics of each part of the requirements of the layout has obvious differences, the layout of the various components will be launched according to the signal process, at the same time should take into account the shielding, electromagnetic compatibility (EMC) requirements of the design. Considering the reliability and stability of the product, the signal integrity (SI) problem is also considered.


After analyzing the typical design examples, we can get a parallel design layout method: type of circuit topology, planning suitable space for each component, arrange suitable for Parallel Layout Design engineer.


Role arrangement


1. communication protocol related groups, including RF components (power amplifier / transceiver / inverter), analog to digital components, conventional analog / logic components, digital baseband processor, etc.;


2. application related groups, including LCD/ backlight driver, image processing engine, application processor, memory (RAM), flash memory (Flash), storage (SDCard) and so on;


3. public signal related groups, including peripheral interfaces, power and power management, and clock components.


Assume that each of these parallel phases is performed by an engineer and completed. The following roles are assigned: Engineer A is responsible for layout design and communication protocol layout; Engineer B is responsible for application related group layout; Engineer C is responsible for public signal related group layout. The role arrangement principle focuses on the skills and expertise of each engineer.


Layout parallel design


The A will be the main design engineer (guidance into the net table, stage design document structure design, installation hole constraint mapping) for, according to the decomposition method of planning layout and the design requirements of material number, layout interval distribution, making the task allocation that document; A generation principle design engineer the distribution, task lists, material documentation and PCB design documents to the other 2 engineers.


Each engineer (including engineers, A) layout according to their respective layout, region and related requirements. After the layout is finished, the devices that have nothing to do with their tasks are deleted. Export their sub layout files through the PCB tool software and submit them to the Engineer in charge of A.


After receiving the child layout files, the engineer, A, continues to import the sub layout file into its own sub layout file sequentially through the PCB tool software. The Engineer A carries out the final layout adjustment and optimization according to the design requirements.


Parallel design of cabling


The starting point of routing analysis is topology analysis of circuit topology.  Electrical signals can be divided into two categories: critical signals (signals with strict electrical constraints) and non critical signals.


Still consider the aforementioned examples of mobile phone board design, each part of the wiring requirements are obvious differences. The wiring of each component still needs to be carried out according to the layout elements and the signal process, taking into account the design requirements of the electrical performance.


For the typical design examples, the following parallel design routing method can be considered: the routing priority is determined by the topological type of the circuit (i.e., the requirement area segmentation) and the signal flow. For routing with high priority (and often larger workload), routing is preferred to ensure performance and schedule.


The concurrent design task assignment can be considered in the high priority routing task. Finally, the responsible engineer will finally improve and organize the task. In addition, the tool is different from the layout stage, and the export stage will be the sub design file.


 

(Source: intenral information)

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